Since the wider the printed line, the smaller the inductance, the lead-out line from the pad to the via should be as wide as possible, if possible, the same as the width of the pad. This way you can use 20mil wide pinouts even for 0402 packaged capacitors. Pinout and via mounting is shown in Figure 17, note the various dimensions in the diagram.
Power System Decoupling Design The optimal design is achieved by combining pin decoupling and power plane decoupling. The decoupling design of the clock, PLL, DLL, etc. should use pin decoupling, and if necessary, a filter network should be added, and the analog power supply should be filtered by magnetic beads, etc.